| 000 -LEADER |
|---|
| fixed length control field |
02356 a2200229 4500 |
| 003 - CONTROL NUMBER IDENTIFIER |
|---|
| control field |
Nust |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20221125105100.0 |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
|---|
| LC control number |
95000312 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9971513803 |
| 040 ## - CATALOGING SOURCE |
|---|
| Transcribing agency |
Nust |
| 082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.3815,DEM |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
DeMassa, Thomas A. |
| 9 (RLIN) |
83368 |
| 245 10 - TITLE STATEMENT |
|---|
| Title |
Digital integrated circuits / |
| Statement of responsibility, etc. |
Thomas A. DeMassa, Zack Ciccone. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
New York : |
| Name of publisher, distributor, etc. |
Wiley, |
| Date of publication, distribution, etc. |
c1996. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xvi, 683 p. : |
| Other physical details |
ill. ; |
| Dimensions |
26 cm. |
| 505 ## - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
Properties and Definitions of Digital ICs (Page-1), Diodes (Page-15), Bipolar Junction Transistors (Page-27), Introduction to Bipolar Digital Circuits (Page-42), Resistor Transistor Logic (RTL) (Page-56), Diode-Transistor Logic (DTL) (Page-72), Transistor-Transistor Logic ( TTL) (Page-83), Schottky Transistor Transistor Logic (STTL) (Page-98), Advanced Schottky Transistor Transistor Logic (ASTTL) (Page-115), Other TTL Gates (Page-124), Basic Emitter-Coupled Logic (ECl) (Page-155), Temperature Compensating Emitter Coupled Logic (Page-171), Mecl III and ECL 10K (Page-182), Modern Emitter Coupled Logic (Page-194), Other ECL Gates (Page-201), Metal Oxide Semiconductor Field Effect Transistors (Page-221), Introduction to MOS Digital Circuits (Page-234), Resistor Loaded NMOS Inverter (Page-244), Saturated Enhancement only Loaded NMOS Inverter (Page-261), Linear Enhancement only Loaded NMOS Inverter (Page-274), NMOS Gates (Page-301), CMOS Inverter (Page-336), CMOS Combinational Logic Gates (Page-373), CMOS Tri-State Gates (Page-411), CMOS Schmitt Trigger Gates (Page-437), CMOS Drivers (Page-453), Dynamic CMOS (Page-467), Bicmos (Page-486), Latches and Flip-Flops (Page-498), Semiconductor Read-only Memories (Page-556), Semiconductor Static Random-Access Memories (Page-603), Gallium Arsenide Metal Semiconductor Field Effect Transistors (Page-613), Direct Coupled Nmesfet Logic (DCFL) Inverter (Page-622), Schottky Diode Nmesfet Logic (SDFL) Inverter (Page-633), Bufferd Nmesfet Logic (BFL) Inverter (Page-642), Other Gallium Arsenide Logic Family Inverters (Page-649), Gallium Arsenid Nmesfet Gates (Page-655). |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Telecommunication engineering |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Ciccone, Zack. |
| 9 (RLIN) |
83369 |
| 856 42 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Materials specified |
Publisher description |
| Uniform Resource Identifier |
<a href="http://www.loc.gov/catdir/description/wiley034/95000312.html">http://www.loc.gov/catdir/description/wiley034/95000312.html</a> |
| 856 42 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Materials specified |
Table of Contents |
| Uniform Resource Identifier |
<a href="http://www.loc.gov/catdir/toc/onix05/95000312.html">http://www.loc.gov/catdir/toc/onix05/95000312.html</a> |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
|
| Koha item type |
Book |
