Implementation & Evaluation of Sha-3 Candidate Grostl on FPGA Platform using Optimized Architectures for High Throughput and Low Area / (Record no. 535509)

000 -LEADER
fixed length control field 00601nam a22001577a 4500
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
Qualifying information Hard Cover.
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Muhammad Adnan, Syed
245 ## - TITLE STATEMENT
Title Implementation & Evaluation of Sha-3 Candidate Grostl on FPGA Platform using Optimized Architectures for High Throughput and Low Area /
Statement of responsibility, etc. Syed Muhammad Adnan.
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. Islamabad:
Name of publisher, distributor, etc. PNEC NUST,
Date of publication, distribution, etc. 2012.
300 ## - PHYSICAL DESCRIPTION
Extent 50 p. :
Other physical details ill. ;
Dimensions 30cm.
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Koha item type Thesis
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Electrical Engineering in Communication MS-Thesis.
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name Dr. Arshad Aziz
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
-- 30101
700 ## - ADDED ENTRY--PERSONAL NAME
-- 29617
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Permanent Location Current Location Shelving location Date acquired Full call number Barcode Date last seen Price effective from Non-public note Koha item type
          Central Library (CL) Central Library (CL) Thesis 09/15/2020 621.3 CL-T-6067 09/15/2020 09/15/2020 Minute Sheet No. 0929/02/CL/Survey/5 dated 23rd April 2024 E-MIN ID 114741 Thesis
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