V-Holt Verifier (A formal verification tool for combinational circuits) Nirmal Saeed
Publisher: Islamabad NUST-SEECS 2012Description: 72p. ;ill. ;27cm.+ CD ROMDDC classification: BEE-5 Online resources: Click here to access online| Item type | Current location | Home library | Shelving location | Call number | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|---|
Project Report
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Central Library (CL) | Central Library (CL) | BEE-5 NIR (Browse shelf) | WITHDRAWN | SEECSP01132 | |||
Thesis
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Central Library (CL) | Central Library (CL) | Thesis | 621.3 (Browse shelf) | WITHDRAWN | CL-BP-702 |
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Supervisors: Dr. Osma Hasan, Dr. M. Murtaza Khan
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