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Towards automatic formal verification on generic combinational circuit using HOL

By: Sumayya Shiraz Material type: Text

TextPublisher: Islamabad NUST-SEECS 2014Description: 88 CD ROMDDC classification: MSEE-3 Online resources: Click here to access online

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Item type	Current location	Home library	Collection	Shelving location	Call number	Status	Date due	Barcode	Item holds
Thesis	Central Library (CL)	Central Library (CL)		Thesis	621.3MSEE-3 (Browse shelf)	Available		CL-T-4064
Project Report	Central Library (CL)	Central Library (CL)	NFIC	General Stacks	MSEE-3 (Browse shelf)	Available		SEECSP01588

Total holds: 0

Previous	No cover image available	No cover image available	No cover image available	No cover image available	No cover image available	No cover image available	No cover image available	Next
Previous	621 Decision Support System for Automated Detection of Glaucoma using Digital Fundus Imagery /	621 Rolling Element Bearing Fault Diagnosis System /	621.3MSEE-2 Design and Analysis of Novel Microstrip Hairpin Line Filter Using Via Ground Holes and Capacitive Gap	621.3MSEE-3 Towards automatic formal verification on generic combinational circuit using HOL	621.3MSEE-3 A feasibility study into passive online geometric calibration for quadric projection surfaces.	621.3MSEE-3 Sentiment analysis on autistic kids	621.3MSEE-4 FAI Low complexity solar energy model for energy provisioning in wireless sensor networks	Next

Supervisors:Dr. Osman Hasan, Dr. Muhammad Murtaza Khan, Dr. Rehan Hafiz, Dr. Amir Ali Khan

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