Pentium pro family developer's manual operating systems writer's guide Intel

Series: 3Publisher: New York Intel 1996Edition: Vol-IIIISBN: 1555122612Subject(s): Computer scienceDDC classification: 004.16,INT
Contents:
About This Manual (Page-1-1), System Architecture Overview (Page-2-1), Protected Mode Memory Management (Page-3-1), Protection (Page-4-1), Interrupt And Exception Handling (Page-5-1), Task Management (Page-6-1), Multiple Processor Management (Page-7-1), Processor Management And Initialization (Page-8-1), System Management Mode (Page-9-1), Debugging And Performance Monitoring (Page-10-1), Memory Cache Control (Page-11-1), 8086 Emulation (Page-12-1), Mixing 16 Bit And 32 Bit Code (Page-13-1), Code Optimization (Page-14-1), Intel Architecture Compatibility (Page-15-1), Machine Check Architecture (Page-16-1)
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Item type Current location Home library Shelving location Call number URL Status Notes Date due Barcode Item holds
Book Book Military College of Signals (MCS)
Military College of Signals (MCS)
General Stacks 004.16,INT (Browse shelf) Link to resource Available Almirah No. 2, Shelf No.1 MCS27133
Total holds: 0

About This Manual (Page-1-1), System Architecture Overview (Page-2-1), Protected Mode Memory Management (Page-3-1), Protection (Page-4-1), Interrupt And Exception Handling (Page-5-1), Task Management (Page-6-1), Multiple Processor Management (Page-7-1), Processor Management And Initialization (Page-8-1), System Management Mode (Page-9-1), Debugging And Performance Monitoring (Page-10-1), Memory Cache Control (Page-11-1), 8086 Emulation (Page-12-1), Mixing 16 Bit And 32 Bit Code (Page-13-1), Code Optimization (Page-14-1), Intel Architecture Compatibility (Page-15-1), Machine Check Architecture (Page-16-1)

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