TY  - GEN
AU  - Nirmal Saeed
AU  - Ayesha Inam, Aisha Khan
TI  - V-Holt Verifier (A formal verification tool for combinational circuits)
U1  - BEE-5 
PY  - 2012///
CY  - Islamabad
PB  - NUST-SEECS
N1  - Supervisors: Dr. Osma Hasan, Dr. M. Murtaza Khan
UR  - http://10.250.8.41:8080/xmlui/handle/123456789/3507
ER  -