Uyemura, John P. (John Paul), <br/><br/>
Chip design for submicron VLSI : CMOS layout and simulation 

 - New Delhi, India  Cengage Learning  2006 
 - xvi, 411 p.  ill. ;  1 CD-ROM (4 3/4 in.) 
<br/><br/> Includes bibliographical references and index. 
<br/><br/><label>ISBN: </label>9788131501955 
<br/><br/><label>Subjects--Topical Terms: </label><br/>1. Microwind.  2.  	Metal oxide semiconductors, Complementary --Design and construction.  3.  	Integrated circuits --Very large scale integration --Design and construction.
<br/><br/><label>Dewey Class. No.: </label>621.395 UYE