TY  - GEN
AU  - DeMassa,Thomas A.
AU  - Ciccone,Zack
TI  - Digital integrated circuits
SN  - 9971513803
U1  - 621.3815,DEM 
PY  - 1996///
CY  - New York
PB  - Wiley
KW  - Telecommunication engineering
N1  - Properties and Definitions of Digital ICs (Page-1), Diodes (Page-15), Bipolar Junction Transistors (Page-27), Introduction to Bipolar Digital Circuits (Page-42), Resistor Transistor Logic (RTL) (Page-56), Diode-Transistor Logic (DTL) (Page-72), Transistor-Transistor Logic ( TTL) (Page-83), Schottky Transistor Transistor Logic (STTL) (Page-98), Advanced Schottky Transistor Transistor Logic (ASTTL) (Page-115), Other TTL Gates (Page-124), Basic Emitter-Coupled Logic (ECl) (Page-155), Temperature Compensating Emitter Coupled Logic (Page-171), Mecl III and ECL 10K (Page-182), Modern Emitter Coupled Logic (Page-194), Other ECL Gates (Page-201), Metal Oxide Semiconductor Field Effect Transistors (Page-221), Introduction to MOS Digital Circuits (Page-234), Resistor Loaded NMOS Inverter (Page-244), Saturated Enhancement only Loaded NMOS Inverter (Page-261), Linear Enhancement only Loaded NMOS Inverter (Page-274), NMOS Gates (Page-301), CMOS Inverter (Page-336), CMOS Combinational Logic Gates (Page-373), CMOS Tri-State Gates (Page-411), CMOS Schmitt Trigger Gates (Page-437), CMOS Drivers (Page-453), Dynamic CMOS (Page-467), Bicmos (Page-486), Latches and Flip-Flops (Page-498), Semiconductor Read-only Memories  (Page-556), Semiconductor Static Random-Access Memories (Page-603), Gallium Arsenide Metal Semiconductor  Field Effect Transistors (Page-613), Direct Coupled Nmesfet Logic (DCFL) Inverter (Page-622), Schottky Diode Nmesfet Logic (SDFL) Inverter (Page-633), Bufferd Nmesfet Logic (BFL) Inverter (Page-642), Other Gallium Arsenide Logic Family Inverters (Page-649), Gallium Arsenid Nmesfet Gates (Page-655).
UR  - http://www.loc.gov/catdir/description/wiley034/95000312.html
UR  - http://www.loc.gov/catdir/toc/onix05/95000312.html
ER  -