TY  - GEN
AU  - Parhi,Keshab K.
TI  - VLSI digital signal processing systems: design and implementation 
SN  - 0471241865 (cloth : alk. paper)
U1  - 621.395,PAR 
PY  - 1999///
CY  - New York
PB  - Wiley
KW  - Integrated circuits
KW  - Very large scale integration
N1  - Introduction to Digital Signal Processing Systems (Page-1), Iteration Bound (Page-43), Pipelining and Parallel Processing (Page-63), Retiming (Page-91), Unfolding (Page-119), Folding (Page-149), Systolic Architecture Design (Page-189), Fast Convolution (Page-227), Algorithmic Strength Reduction in Filters and Transforms (Page-255), Pipelined and Parallel Recursive and Adaptive Filters (Page-313), Scaling and Roundoff Noise (Page-377), Digital Lattice Filter Structures (Page-421), Bit-Level Arithmetic Architectures (Page-477), Redundant Arithmetic (Page-529), Numerical Strength Reduction (Page-559), Low Power Design (Page-645), Programmable Digital Signal Processors (Page-695)
UR  - http://www.loc.gov/catdir/bios/wiley041/98036462.html
UR  - http://www.loc.gov/catdir/description/wiley032/98036462.html
UR  - http://www.loc.gov/catdir/toc/onix03/98036462.html
ER  -