TY  - GEN
AU  - Ciletti,Michael D.
TI  - Advanced digital design with Verilog HDL
SN  - 0-13-089161-4
U1  - 621.395,CIL 
PY  - 2003///
CY  - Upper Saddle River, NJ
PB  - Pearson Education
KW  - Digital electronics
KW  - Logic circuits
KW  - Computer-aided design
KW  - Verilog (Computer hardware description language)
N1  - Introduction to digital design methodology (Page-1), Review of combinational logic design (Page-13), Fundamentals of sequential logic design (Page-69), Introduction to logic design with verilog (Page-103), Logic design with behavioral models of combinational and sequential logic (Page-143), Synthesis of combinational and sequential logic (Page-233), Design and synthesis of datapath controllers (Page-347), Programmable logic and storage devices (Page-415), Algorithms and architectures for digital processors (Page-547), Architectures for arithmetic processors (Page-651), Post synthesis design tasks (Page-765), List of tables (Page-983)
ER  -