TY  - GEN
AU  - Chu,Pong P.
TI  - RTL hardware design using VHDL :coding for efficiency, portability, and scalability -(E-BOOK)
SN  - 0471720925 (alk. paper)
U1  - 621.392 
PY  - 2006///
CY  - Hoboken, N.J.
PB  - Wiley-Interscience
KW  - Digital electronics
KW  - Data processing
KW  - VHDL (Computer hardware description language)
KW  - E-BOOK
N1  - Introduction to Digital System Design (Page-1)  Overview of Hardware Description Languages (Page-23) Basic Language Constructs of VHDL (Page-43) Concurrent Signal Assignment Statements of VHDL 69 (Page-69 )Sequential Statements of VHDL (Page-97)Synthesis Of VHDL Code (Page-125 )Combinational Circuit Design: Practice(Page-163)Sequential Circuit Design: Principle  (Page-213)Sequential Circuit Design: Practice (Page-257)Finite State Machine: Principle and Practice (Page-313)Register Transfer Methodology: Principle (Page-373)Register Transfer Methodology: Practice (Page-421)Hierarchical Design in VHDL ( 473)Parameterized Design: Principle (Page-499)Parameterized Design: Practice (Page-545) Clock and Synchronization: Principle and Practice (Page-603)
UR  - http://www.loc.gov/catdir/enhancements/fy0740/2005054234-b.html
UR  - http://www.loc.gov/catdir/enhancements/fy0625/2005054234-d.html
UR  - http://www.loc.gov/catdir/enhancements/fy0653/2005054234-t.html
ER  -