TY  - GEN
AU  - Chang, K.C
TI  - Digital systems design with VHDL and synthesis: an integrated approach 
SN  - 9812531610
U1  - 621.392,CHA 
PY  - 1999///
CY  - Washington
PB  - IEEE computer society
KW  - Digital systems design with VHDL and synthesis
N1  - Introduction (Page-1), VHDL and digital circuit primitives (Page-4), VHDL simulation and synthesis environment and design process (Page-32), Basic combinational circuits (Page-53), Basic binary arithmetic circuits (Page-91), Basic sequential circuits (Page-143), Registers (Page-187), Clock and reset circuits (Page-222), Dual port ram,fifo and dram modeling (Page-251), A design case study :finite impulse response filter asic design (Page-288), A design case study a microprogram controller design (Page-341),,Error detection and correction (Page-390), Fixed point multiplication (Page-408), Ffixed point division (Page-445), Floating -point arithmetic (Page-467)
ER  -