Navabi, Zainalabedin. <br/><br/>
Verilog digital system design: RT level synthesis, testbench and verification  RT level synthesis, testbench and verification 
Zainalabedin Navabi. 
 - 2nd ed. 
 - New York :  McGraw-Hill,  c2006. 
 - xvi, 384 p. :  ill. ;  24 cm. +  1 CD-ROM (4 3/4 in.) 
 - McGraw-Hill electronic engineering .
<br/><br/><label>ISBN: </label>0071445641 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Verilog (Computer hardware description language)<br/>Electronic digital computers--Computer-aided design.
<br/><br/><label>Dewey Class. No.: </label>621.392