000 02102 a2200277 4500
003 Nust
005 20221130095607.0
010 _a 2004275960
020 _a047170055X
040 _cNust
082 0 0 _a621.38152,BAK
100 1 _aBaker, R. Jacob,
_968300
245 1 0 _aCMOS circuit design, layout, and simulation /
_cR. Jacob Baker.
250 _a2nd ed.
260 _aNew York :
_bIEEE Press,
_cc2005.
300 _axxxiii, 1038 p. :
_bill. ;
_c25 cm.
440 0 _aIEEE Press series on microelectronic systems
_999208
505 _aIntroduction to CMOS Design (Page-1), The Well (Page-31), The Metal Layers (Page-59), The Active and Poly Layers (Page-83), Resistors, Capacitors, MOSFETs (Page-105), MOSFET Operation (Page-131), CMOS Fabrication by Jeff Jessing (Page-161), Electrical Noise: an overview (Page-213), Models for Analog Design (Page-269), Models for Digital Design (Page-311), The Inverter (Page-331), Static Logic Gates (Page-353), Clocked Circuits (Page-375), Dynamic Logic Gates (Page-397), VLSI Layout Examples (Page-411), Memory Circuits (Page-433), Sensing Using ?S Modulation (Page-483), Special Purpose CMOS Circuits (Page-523), Digital Phase-Locked Loops (Page-551), Current Mirrors (Page-613), Amplifiers (Page-657), Differential Amplifiers (Page-711), Voltage References (Page-745), Operational Amplifiers I (Page-773), Dynamic Analog Circuits (Page-829), Operational Amplifiers II (Page-863), Nonlinear Analog Circuits (Page-909), Data Converter Fundamentals (Page-931), Data Converter Architectures (Page-965).
650 0 _aTelecommunication Engineering.
710 2 _aInstitute of Electrical and Electronics Engineers.
_925745
856 4 2 _3Book review (E-STREAMS)
_uhttp://www.e-streams.com/es0902/es0902_4363.html
856 4 2 _3Contributor biographical information
_uhttp://www.loc.gov/catdir/enhancements/fy0620/2004275960-b.html
856 4 2 _3Publisher description
_uhttp://www.loc.gov/catdir/enhancements/fy0620/2004275960-d.html
856 4 2 _3Table of contents only
_uhttp://www.loc.gov/catdir/enhancements/fy0620/2004275960-t.html
942 _cBK
_2ddc
999 _c175717
_d175717