000			01551 a2200229 4500
003			Nust
005			20221229105127.0
010			_a 98036462
020			_a0471241865 (cloth : alk. paper)
040			_cNust
082	0	0	_a621.395,PAR
100	1		_aParhi, Keshab K., _9667
245	1	0	_aVLSI digital signal processing systems : _bdesign and implementation / _cKeshab K. Parhi.
260			_aNew York : _bWiley, _c1999.
300			_axx, 784 p. : _bill. ; _c24 cm.
505			_aIntroduction to Digital Signal Processing Systems (Page-1), Iteration Bound (Page-43), Pipelining and Parallel Processing (Page-63), Retiming (Page-91), Unfolding (Page-119), Folding (Page-149), Systolic Architecture Design (Page-189), Fast Convolution (Page-227), Algorithmic Strength Reduction in Filters and Transforms (Page-255), Pipelined and Parallel Recursive and Adaptive Filters (Page-313), Scaling and Roundoff Noise (Page-377), Digital Lattice Filter Structures (Page-421), Bit-Level Arithmetic Architectures (Page-477), Redundant Arithmetic (Page-529), Numerical Strength Reduction (Page-559), Low Power Design (Page-645), Programmable Digital Signal Processors (Page-695).
650		0	_aIntegrated circuits _xVery large scale integration. _92955
856	4	2	_3Contributor biographical information _uhttp://www.loc.gov/catdir/bios/wiley041/98036462.html
856	4	2	_3Publisher description _uhttp://www.loc.gov/catdir/description/wiley032/98036462.html
856	4	2	_3Table of Contents _uhttp://www.loc.gov/catdir/toc/onix03/98036462.html
942			_2ddc _cBK
999			_c183847 _d183847