000 00572 a2200169 4500
003 Nust
005 20170207171533.0
040 _cNust
082 _a005.1
100 _aAli, Sajjad (MSCS-19)
245 _aFormal Verification of Embedded Systems
_cSajjad Ali
260 _aRawalpindi
_bMCS,NUST
_c2015
300 _ax, 89 p
500 _aIntroduction (Page-1) Literature Review (Page-10) Proposed Methodology (Page-21) Preliminaries (Page-29) Case Studies (Page-35) Results and Discussion, Future work and Conclusion (Page-75)
650 _aPG Thesis
651 _aMSCS-19
942 _cTHS
999 _c217103
_d217103