000 00494nam a22001697a 4500
003 NUST - PNEC
005 20170116181010.0
008 150913b xxu||||| |||| 00| 0 eng d
020 _a8131706338
040 _cLIBRARY
082 _a621.392 YAL
100 _910070
_aYalamanchili, Sudhakar
245 _aIntroductory VHDL : from simulation to synthesis
_cSudhakar Yalamanchili
260 _cc.2001
650 _910072
_aVHDL (Computer hardware description language)
_xMIS
942 _2ddc
_cBK
999 _c67032
_d67032