Digital integrated circuits / Thomas A. DeMassa, Zack Ciccone.
Publisher: New York : Wiley, c1996Description: xvi, 683 p. : ill. ; 26 cmISBN: 9971513803Subject(s): Telecommunication engineeringDDC classification: 621.3815,DEM Online resources: Publisher description | Table of Contents| Item type | Current location | Home library | Shelving location | Call number | URL | Status | Notes | Date due | Barcode | Item holds |
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Military College of Signals (MCS) | Military College of Signals (MCS) | General Stacks | 621.3815,DEM (Browse shelf) | Link to resource | Available | Almirah No.32, Shelf No.5 | MCS30332 | ||
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Book
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Military College of Signals (MCS) | Military College of Signals (MCS) | General Stacks | 621.3815,DEM (Browse shelf) | Link to resource | Available | Almirah No.32, Shelf No.5 | MCS31811 |
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| 621.3815,CAT Schaum's outline electronic devices and circuits / | 621.3815,COU Operational amplifiers and linear integrated circuits / | 621.3815,DAS Das TTL- Kochbuch : Deutschprachige TTL Applikationen / | 621.3815,DEM Digital integrated circuits / | 621.3815,DEM Digital integrated circuits / | 621.3815,DES Designing with TTL integrated circuits / | 621.3815,DES Designing with TTL integrated circuits / |
Properties and Definitions of Digital ICs (Page-1), Diodes (Page-15), Bipolar Junction Transistors (Page-27), Introduction to Bipolar Digital Circuits (Page-42), Resistor Transistor Logic (RTL) (Page-56), Diode-Transistor Logic (DTL) (Page-72), Transistor-Transistor Logic ( TTL) (Page-83), Schottky Transistor Transistor Logic (STTL) (Page-98), Advanced Schottky Transistor Transistor Logic (ASTTL) (Page-115), Other TTL Gates (Page-124), Basic Emitter-Coupled Logic (ECl) (Page-155), Temperature Compensating Emitter Coupled Logic (Page-171), Mecl III and ECL 10K (Page-182), Modern Emitter Coupled Logic (Page-194), Other ECL Gates (Page-201), Metal Oxide Semiconductor Field Effect Transistors (Page-221), Introduction to MOS Digital Circuits (Page-234), Resistor Loaded NMOS Inverter (Page-244), Saturated Enhancement only Loaded NMOS Inverter (Page-261), Linear Enhancement only Loaded NMOS Inverter (Page-274), NMOS Gates (Page-301), CMOS Inverter (Page-336), CMOS Combinational Logic Gates (Page-373), CMOS Tri-State Gates (Page-411), CMOS Schmitt Trigger Gates (Page-437), CMOS Drivers (Page-453), Dynamic CMOS (Page-467), Bicmos (Page-486), Latches and Flip-Flops (Page-498), Semiconductor Read-only Memories (Page-556), Semiconductor Static Random-Access Memories (Page-603), Gallium Arsenide Metal Semiconductor Field Effect Transistors (Page-613), Direct Coupled Nmesfet Logic (DCFL) Inverter (Page-622), Schottky Diode Nmesfet Logic (SDFL) Inverter (Page-633), Bufferd Nmesfet Logic (BFL) Inverter (Page-642), Other Gallium Arsenide Logic Family Inverters (Page-649), Gallium Arsenid Nmesfet Gates (Page-655).
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