Chip design for submicron VLSI : CMOS layout and simulation

By: Uyemura, John P. (John Paul)Material type: TextTextPublisher: New Delhi, India Cengage Learning 2006Description: xvi, 411 p. ill. ; 1 CD-ROM (4 3/4 in.)ISBN: 9788131501955Subject(s): 1. Microwind. 2. Metal oxide semiconductors, Complementary --Design and construction. 3. Integrated circuits --Very large scale integration --Design and constructionDDC classification: 621.395 UYE
Tags from this library: No tags from this library for this title. Log in to add tags.
Item type Current location Home library Collection Shelving location Call number Status Date due Barcode Item holds
Book Book Central Library (CL)
Central Library (CL)
NFIC General Stacks 621.395 UYE (Browse shelf) Available SEECS012827
Total holds: 0

Includes bibliographical references and index.

There are no comments on this title.

to post a comment.
© 2023 Central Library, National University of Sciences and Technology. All Rights Reserved.